Semiconductor devices to be set in electronic equipment have been demanded to be smaller in size, thinner in thickness, and lighter in weight to be used in cell phones, portable computers, and the like. To satisfy these requirements, a semiconductor device called a CSP (Chip Scale Package) has been developed that has a size similar to that of a semiconductor element incorporated therein.
A WLP (Wafer Level Package) is an especially small type of the CSP (see, for example, Japanese Patent Application Publication No. 2004-172542). A general method for manufacturing a WLP includes: providing multiple semiconductor device portions arranged in a matrix in a semiconductor wafer; forming wirings and solder electrodes on a main surface of the semiconductor wafer, the wirings and solder electrodes being connected to diffusion regions of the semiconductor device portions; and then dicing the semiconductor wafer in a lattice pattern to separate the individual semiconductor device portions from one another.
In the above-described general method for manufacturing a WLP, however, making the thickness of the WLP to be manufactured to be, for example, 100 μm or less requires the semiconductor wafer before the dicing to be made to have an extremely thin thickness of 100 μm or less. This leads to a lower mechanical strength of the thinned semiconductor wafer and in many cases causes a problem of a semiconductor wafer being damaged in a transportation step or the like.
As a method for manufacturing a WLP solving such a problem, Dicing Before Grinding (hereinafter abbreviated as DBG) has been developed (see Japanese Patent Application Publication No. 2005-101290). In a method for manufacturing a semiconductor device employing the DBG, a semiconductor wafer on which wirings and the like are formed is half cut from the front surface, and then, the back surface of the wafer is ground. Thus, the semiconductor wafer is separated into individual semiconductor devices at half cut portions. The method for dividing the semiconductor wafer by the DBG is described with reference to FIG. 11 and FIG. 12.
With reference to Part (A) of FIG. 11, first, a semiconductor wafer 100 in which semiconductor device portions 108 are formed in a matrix pattern is prepared. An element such as a transistor is formed near the upper surface of each of the semiconductor device portions 108 by a diffusion step. The upper surface of the semiconductor wafer 100 is covered with an insulating layer 102 made of an oxide film. Wirings 104 connected to element regions are formed on the upper surface of the insulating layer 102. Further, external electrodes 106 made of a solder are formed on the wirings 104. The semiconductor wafer 100 has a thickness of about 280 μm, for example, in this step.
With reference to Part (B) of FIG. 11, next, the dicing is performed on the semiconductor wafer 100 from the upper surface, whereby grooves 110 are formed between the semiconductor device portions 108. The dicing in this step does not separate the semiconductor wafer 100, and the depth of the grooves 110 formed by the dicing is smaller than the thickness of the semiconductor wafer 100. For example, when the semiconductor wafer 100 has a thickness of 280 μm as described above, the depth of the grooves 110 is set to be about 100 μm. Thus, the semiconductor wafer 100 after this step is not separated, but is in a form of a single plate.
With reference to Part (C) of FIG. 11, the semiconductor wafer 100 is turned over and then the bottom surface of the semiconductor wafer 100 on which the wirings 104 are formed, is attached to an adhesive tape 112. Moreover, the semiconductor wafer 100 is ground from the upper surface to make the semiconductor wafer 100 thin over the entire area.
With reference to Part (D) of FIG. 11, the semiconductor wafer 100 is further ground from the upper surface to be separated into individual semiconductor device portions 108 at portions at which the grooves 110 are separated.
With reference to Part (A) of FIG. 12 and Part (B) of FIG. 12, subsequently, the back surface side (ground surface side) of each of the semiconductor device portions 108 is attached to an adhesive tape 114 made of a dicing sheet for example. Then, the adhesive tape 112 is peeled off. Thus, the semiconductor device portions 108 can be picked up from the front surface side (surface on which a circuit is formed) by peeling off the adhesive tape 12.
After the above step, the semiconductor devices are picked up to be separated from the adhesive tape 114. Then, a laser beam is applied on the bottom surface (surface from which the semiconductor material is exposed) to provide markings thereon. Then, the semiconductor devices are subjected to taping packaging or the like.